This invention relates to the distribution of signals in, or for, integrated circuits, with minimal signal skew. The invention is particularly suited to distributing signals such as clock or trigger signals, but it is not limited exclusively to such signals.
Within integrated circuits, clock signals are usually distributed across the integrated circuit die by metal interconnect layers. This has the intrinsic disadvantage that the metal layer used to distribute the clock signal can be affected by signal path xe2x80x9cwiresxe2x80x9d in other layers running parallel to, or crossing, the clock signal xe2x80x9cwiresxe2x80x9d.
These wires in other layers cause problems because they couple capacitively with the clock wire, causing variations in the speed at which the clock signal can be propagated around the die. The variation in propagation delay is referred to herein as xe2x80x9cskewxe2x80x9d. Skew is important because it can be very difficult to ensure that the clock pulses reach different parts of the die at the same time. Skew is one of the factors which can severely limit the maximum operating speed of the integrated circuit; problems can occur if some parts of the integrated circuit are operating out of sequence with others, due to a large clock signal skew.
Even if very sophisticated clock signal routing algorithms are used, the clock wires will always be running near other wires. It is possible to predict the capacitive effect of wires running in close proximity to each other by using a special routing algorithm. However, such predictions are only effective for DC signal conditions; it is harder to predict the actual effect which may occur if the wires carry switching signals which have a different effect from a DC line, even for simple circuit configurations. With the increasing complexity of integrated circuits with many billions of internal wires, it is difficult even to predict DC coupling effects, and virtually impossible to predict dynamic switching effect in realistic design timescales.
The above problems can often delay development and design of integrated circuits, and increase development costs. Different arrangements of clock wires may be tried and refined progressively to counter the effects of unpredictable skew.
Techniques for communicating an optical signal have been proposed, for example in U.S. Pat. No. 5,394,490 and EP 0588746, and also in co-owned UK patent application No. 9712177.6.
Broadly speaking, one aspect of the invention is to communicate, and/or distribute signals optically within an integrated circuit package, such that the optical signals are available across (or illuminate) the majority of the surface of the integrated circuit die; to convert the optical signals to electronic signals on the integrated circuit die at a plurality of different conversion sites; and, at at least one site, to condition (or xe2x80x9cclean upxe2x80x9d) the electronic signals, and to distribute the electronic signals to a plurality of xe2x80x9clocalxe2x80x9d circuits driven by the signal from the conversion site. In a preferred form, the electronic signals are clock signals or trigger signals.
The term xe2x80x9copticalxe2x80x9d as used herein is not restricted to visible light, but is intended to refer generally to radiation which substantially obeys the laws of optics.
Such a technique can avoid the problems of capacitive coupling and other signal interference encountered with traditional interconnect wires, and enable signals to be distributed with minimal signal skew. The speed of signal propagation is limited only by the speed of light (and the switching speed of the circuit components used to produce and receive the optical signals, which is predictable). For example, for a 15 mm die, the attainable skew could be as small as about 50 ps. This compares very favourably with the minimum of about 400 ps which is attainable with conventional distribution wires. It is expected that future technologies will require a skew of less than about 200 ps, which will be very difficult to achieve using conventional wire techniques.
Moreover the invention can be used to distribute signals, such as clock or trigger signals, simultaneously to different parts of the integrated circuit die, without the same routing and design constraints as those associated with distribution wires. This can provide the die designer with greater flexibility of design, and allow circuits to be arranged on the die in relative positions not hitherto regarded as practical.
The invention can enable development time and costs to be reduced by producing predictable skew across the die. Furthermore, by not using metal wires to distribute clock signals, the number of layout steps would be reduced, which further reduces the time needed to complete a design.
An optical signal may be produced by an optical emitter carried on the die, or carried within the integrated circuit package containing the die, or mounted externally to provide an optical input to the package. The optical signal may illuminate substantially an entire surface of the die, or one or more predetermined areas of the die. Opaque masks may be used to mask areas of the die not intended to receive optical radiation (for example, to reduce unwanted photoelectric effects). If desired an optical guide (i.e. a light guide) may be provided to define predetermined optical paths for the optical signal. Such a guide may be provided by translucent material which can diffuse the light to achieve excellent omni-directional illumination, and avoid shadow effects.
More than one emitter may be used to generate a larger magnitude optical signal, or a plurality of different optical signals.
Each optical signal may be directly equivalent to the signal it represents, so that a digital pulse (e.g., a clock pulse) is represented by an optical pulse. Alternatively, the optical signals may be encoded, for example by modulation.
The optical signal may represent a single signal, or it may represent a plurality of signals. For example, the plurality of signals may be multiplexed, or have different characteristic carrier or modulation frequencies, or be represented by different radiation wavelengths, to enable individual signals to be separated either optically or electronically.
In a preferred embodiment, the optical signals are clock signals, and are distributed across the die and used to clock a plurality of circuit elements, for example, data storage registers. Each element may have, or be associated with, its own optical receiver. Alternatively pluralities of elements may be grouped together and fed from a respective optical receiver for the group. In this way, the optical technique is used to distribute signals on a die-scale, and local wires are then used to distribute the signals to local circuits. A circuit may used to provide a local clock signal different from, but derived from, the optical signal. In this way, the local circuits can be driven by locally generated signals which are synchronised across the die to the optical signal.
In a specific aspect, the invention provides an integrated circuit device comprising an integrated circuit die, and optical means for distributing a clock or trigger signal to different areas of the die.
In another aspect, the invention provides an integrated circuit device comprising an integrated circuit die, optical means for distributing an optical signal to at least first and second areas of the die, a first optical receiver implemented in or on the first area of the die for producing a first electronic signal synchronised to the optical signal, and a second optical receiver implemented in or on the second area of the die for producing a second electronic signal synchronised to the optical signal.
In a further aspect, the invention provides an integrated circuit comprising an optically clockable or triggerable, data signal handling circuit, the data signal handling circuit comprising an optical receiver for receiving an optical signal, and for producing an electronic clock or trigger signal therefrom.
In a yet further aspect, the invention provides a method of communicating a signal to an integrated circuit device and/or for distributing a signal to a plurality of circuits within an integrated circuit device, the method comprising communicating the signal optically, and generating at least one electronic signal responsive to the reception thereof by a circuit on the integrated circuit die.
In a yet further aspect, the invention provides a method of distributing a clock or trigger signal to different areas of an integrated circuit die of an integrated circuit device, the method comprising communicating the signal optically in the integrated circuit device.